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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
September 2010
FAN5353 3MHz, 3A Synchronous Buck Regulator
Features
3MHz Fixed-Frequency Operation Best-in-Class Load Transient 3A Output Current Capability 2.7V to 5.5V Input Voltage Range Adjustable Output Voltage: 0.8V to VIN*0.9 Power Good Output Internal Soft-Start Input Under-Voltage Lockout (UVLO) Thermal Shutdown and Overload Protection 12-lead 3x3.5mm MLP
Description
The FAN5353 is a step-down switching voltage regulator that delivers an adjustable output from an input voltage supply of 2.7V to 5.5V. Using a proprietary architecture with synchronous rectification, the FAN5353 is capable of delivering 3A at over 85% efficiency. The regulator operates at a nominal fixed frequency of 3MHz, which reduces the value of the external components to 470nH for the output inductor and 10F for the output capacitor. Additional output capacitance can be added without affecting stability if tighter regulation during transients is required. The regulator includes an open-drain power good (PGOOD) signal that pulls low when the output is not in regulation. In shutdown mode, the supply current drops below 1A, reducing power consumption. FAN5353 is available in a 12-lead 3x3.5mm MLP package.
R2 R1
Applications
Set-Top Box Hard Disk Drive Communications Cards DSP Power
AGND 1 2 3 4 5 6 P1 (GND) 12 11 10 9 8 7 PGOOD EN VCC PVIN CIN1 CIN
R3
FB VOUT PGND PGND
COUT
CVCC
L1
SW SW
PVIN
Figure 1. Typical Application
Ordering Information
Part Number
FAN5353MPX
Temp. Range
-40 to 85C
Package
MLP-12, 3x3.5mm
Packing Method
Tape and Reel
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Table 1. Recommended External Components for 3A Maximum Load Current
Component
L1
Description
470nH nominal 2 pieces 10F, 6.3V, X5R, 0805 10F, 6.3V, X5R, 0805 10nF, 25V, X7R, 0402 4.7F, 6.3V, X5R, 0603 Resistor: 1 0402
Vendor
Vishay IHLP1616ABER47M01 Coiltronics SD12-R47-R TDK VLC5020T-R47N MURATA LQH55PNR47NT0 GRM21BR60J106M (Murata) C2012X5R0J106M (TDK) GRM155R71E103K (Murata) C1005X7R1E103K (TDK) GRM188R60J475K (Murata) C1608X5R0J475K (TDK) any
Parameter
L DCR
Typ.
0.47 20
Units
H m
COUT CIN CIN1 CVCC R3
(1)
C
10.0
F
C C R
10 4.7 1
nF F
Note: 1. R3 is optional and improves IC power supply noise rejection. See Layout recommendations for more information.
Pin Configuration
FB 1 VOUT 2 PGND 3 PGND 4 SW 5 SW 6 P1 (GND) 12 NC 11 PGOOD 10 EN 9 VCC 8 PVIN 7 PVIN
Figure 2. 12-Pin, 3x3.5mm MLP (Top View)
Pin Definitions
Pin #
1 2 3, 4 5, 6 P1 7, 8 9 10 11 12
Name
FB VOUT PGND SW GND PVIN VCC EN PGOOD NC
Description
FB. Connect to resistor divider. The IC regulates this pin to 0.8V. VOUT. Sense pin for VOUT. Connect to COUT. Power Ground. Low-side MOSFET is referenced to this pin. CIN and COUT should be returned with a minimal path to these pins. Switching Node. Connect to inductor. Ground. All signals are referenced to this pin. Power Input Voltage. Connect to input power source. Connect to CIN with minimal path. IC Bias Supply. Connect to input power source. Use a separate bypass capacitor CVCC from this pin to the P1 GND terminal between pins 1 and 12. Enable. The device is in shutdown mode when this pin is LOW. Do not leave this pin floating. Power Good. This open-drain pin pulls LOW if the output falls out of regulation or is in soft-start. This pin has no function and should be tied to GND.
Note: 2. P1 is the bottom heat-sink pad. Ground plane should flow through pins 3, 4, 12, and P1 and can be extended through pin 11 if PGOOD's function is not required to improve IC cooling.
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol Parameter
VIN SW, PVIN, VCC Pins Other Pins VINOV_SLEW Maximum Slew Rate of VIN Above 6.5V when PWM is Switching RPGOOD ESD TJ TSTG TL Pull-Up Resistance from PGOOD to VCC Electrostatic Discharge Protection Level Junction Temperature Storage Temperature Lead Soldering Temperature, 10 Seconds Human Body Model per JESD22-A114 Charged Device Model per JESD22-C101 IC Not Switching IC Switching
Min.
-0.3 -0.3 -0.3 1 2 2 -40 -65
Max.
7.0 6.5 VCC + 0.3 15
(3)
Units
V V V/ms K KV KV
+150 +150 +260
C C C
Note: 3. Lesser of 7V or VCC+0.3V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC, VIN VOUT IOUT L CIN COUT TA TJ
Parameter
Supply Voltage Range Output Voltage Range Output Current Inductor Input Capacitor Output Capacitor Operating Ambient Temperature Operating Junction Temperature
Min.
2.7 0.8 0
Typ.
Max.
5.5 90% Duty Cycle 3
Units
V V A H F F
0.47 10 20 -40 -40 +85 +125
C C
Thermal Properties
Symbol
JA
Parameter
Junction-to-Ambient Thermal Resistance
(4)
Min.
Typ.
46
Max.
Units
C/W
Note: 4. Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer 1s2p boards in accordance to JESD51- JEDEC standard. Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperate TA.
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Electrical Characteristics
Minimum and maximum values are at VIN = 2.7V to 5.5V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = 25C, VIN =5V.
Symbol Parameter
Power Supplies IQ I SD VUVLO VUVHYST Logic Pins VIH VIL VLHYST IIN IOUTL IOUTH HIGH-Level Input Voltage LOW-Level Input Voltage Logic Input Hysteresis Voltage Input Bias Current PGOOD Pull-Down Current PGOOD HIGH Leakage Current Output Reference DC Accuracy Measured at FB Pin VOUT DC Accuracy Load Regulation Line Regulation Transient Response Power Switch and Protection RDS(ON)P RDS(ON)N ILIMPK TLIMIT THYST VSDWN P-channel MOSFET On Resistance N-channel MOSFET On Resistance P-MOS Peak Current Limit Thermal Shutdown Thermal Shutdown Hysteresis Input OVP Shutdown Quiescent Current Shutdown Supply Current Under-Voltage Lockout Threshold Under-Voltage Lockout Hysteresis
Conditions
ILOAD = 0, VOUT=1.2V EN = GND VIN Rising VIN Falling
Min.
Typ.
14 0.1 2.83
Max.
Units
mA
3.0 2.95 2.40
A V V mV V
2.10
2.30 530
1.05 0.4 100 Input tied to GND or VIN VPGOOD = 0.4V VPGOOD = VIN TA = 25C At VOUT pin W.R.T. Calculated Value, ILOAD = 500mA IOUT(DC) = 0 to 3A 2.7V VIN 5.5V, IOUT(DC) = 1.5A ILOAD step 0.1A to 1.5A, tr = tf = 100ns, VOUT=1.2V 0.792 0.788 1.6% -0.03 0.01 +20 0.01 0.800 0.800 0.01 1.00 1 1 0.808 0.812 +1.6
V mV A mA A V V % %/A %/V mV
VOUT Regulation VREF VREG
VOUT ILOAD VOUT VIN
60 40 3.75 4.55 150 20 Rising Threshold Falling Threshold 5.50 2.7 RLOAD > 5, to VOUT = 1.2V RLOAD > 5, to VOUT = 1.8V 6.2 5.85 3.0 210 340 10 3.3 250 420 5.50
m m A C C V V MHz s s V/ms
Frequency Control fSW Soft-Start tSS VSLEW Regulator Enable to Regulated VOUT Soft-Start VOUT Slew Rate Oscillator Frequency
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Typical Characteristics
Unless otherwise specified, VIN = 5V, VOUT = 1.2V, circuit of Figure 1, and components per Table 1.
100% 90% 80% 70% Efficiency Efficiency 60% 50% 40% 30% 20% 10% 0% 1 10 I
LOAD
100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% 100 1000 10000 1 10 100 1000 10000 Output Current (mA) I LOAD Output Current (mA)
VIN = 3.3V VIN = 5V
VIN = 3.3V VIN = 5V
Figure 3. Efficiency vs. ILOAD at VOUT = 1.2V
100% 90% 80% 70% Efficiency Efficiency 60% 50% 40% 30% 20% 10% 0% 1 10 100 1000 10000 I LOAD Output Current (mA)
VIN = 3.3V VIN = 5V
Figure 4. Efficiency vs. ILOAD at VOUT = 1.8V
100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% 1 10 100 1000 10000 I LOAD Output Current (mA)
VIN = 4.2V VIN = 5V
Figure 5. Efficiency vs. ILOAD at VOUT = 2.5V
1 0.9
Figure 6. Efficiency vs. ILOAD at VOUT = 3.3V
16 15 Quiescent Current (mA) 14 13 12 11 10 9 8
85C 25C -40C
0.8 Supply Current (A) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 2.7 3.2 3.7 4.2 Input Voltage(V) 4.7 5.2
85C 25C 40C
2.7
3.2
3.7
4.2
4.7
5.2
VIN Input Voltage (V)
Figure 7. Shutdown Supply Current vs. VIN, EN to 0V
Figure 8. Quiescent Current vs. VIN, No Load
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Typical Characteristics
Unless otherwise specified, VIN = 5V, VOUT = 1.2V, circuit of Figure 1, and components per Table 1.
VOUT
IL I load
Figure 9. Load Transient Response: 100mA to 1.5A to 100mA, tr=tf=100ns, Horizontal Scale = 5s/div.
20 18 5VIN,1.2VOUT 16 3.3VIN,1.2VOUT 5VIN, 3.3VOUT
Figure 10. Load Transient Response: 500mA to 3A to 500mA, tr=tf=100ns, Horizontal Scale = 5s/div.
3.5 3.0 Switching Frequency (Mhz) 2.5 2.0 1.5 1.0 0.5 0.1 1 10 100 1000 10000
VOUT ripple (mV AC pp)
14 12 10 8 6 4 2 0
VIN = 4.1V VIN = 4.0V VIN = 3.9V VIN = 3.8V
0
0.5
1
1.5 Load Current (A)
2
2.5
3
Load Current (mA)
Figure 11. Output Voltage Ripple vs. Load Current
Figure 12. Effect of tOFF Minimum on Reducing the Switching Frequency at Large Duty Cycles, VOUT = 3.3V
90 80 70 60 50
1.2VOUT,1.5A load
Attenuation (dB)
V IN
PSRR
40 30 20 0.01
VOUT
1.2VOUT, 3A load 3.3VOUT,1.5A load
0.1
1 Frequency (KHz)
10
100
Figure 13. Power Supply Rejection Ratio
Figure 14. Line Transient Response with 1A load, 10s/div.
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Typical Characteristics
Unless otherwise specified, VIN = 5V, VOUT = 1.2V, circuit of Figure 1, and components per Table 1.
Figure 15. Soft-Start: EN Voltage Raised After VIN =5.0V, ILOAD = 0, Horizontal Scale = 100s/div.
Figure 16. Soft-Start: EN Pin Tied to VCC, ILOAD = 0, Horizontal Scale = 1ms/div.
Figure 17. Soft-Start: EN Pin Raised after VIN = 5.0V, RLOAD = 400m. COUT = 100F, Horizontal Scale = 100s/div.
Figure 18. Soft-Start: EN Pin Tied to VCC, RLOAD = 400m, COUT = 100F, Horizontal Scale = 1ms/div.
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Typical Characteristics
Unless otherwise specified, VIN = 5V, VOUT = 1.2V, circuit of Figure 1, and components per Table 1.
Figure 19. VOUT to GND Short Circuit, 200s/div.
Figure 20. VOUT to GND Short Circuit, 5s/div.
Figure 21. Over-Current at Startup: RLOAD = 200m., 50s/div.
Figure 22. Progressive Overload, 200s/div.
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Operation Description
The FAN5353 is a step-down switching voltage regulator that delivers an adjustable output from an input voltage supply of 2.7V to 5.5V. Using a proprietary architecture with synchronous rectification, the FAN5353 is capable of delivering 3A at over 80% efficiency. The regulator operates at a nominal frequency of 3MHz at full load, which reduces the value of the external components to 470nH for the output inductor and 20F for the output capacitor. Synchronous rectification is inhibited during soft-start, allowing the IC to start into a pre-charged load.
PGOOD Pin
The PGOOD pin is an open drain output that indicates the IC is in regulation when its state is open. PGOOD requires an external pull-up resistor. PGOOD pulls LOW under the following conditions: 1. 2. 3. The IC has operated in cycle-by-cycle current limit for eight or more consecutive PWM cycles. The circuit is disabled; either after a fault occurs, or when EN is LOW. The IC is performing a soft-start.
Control Scheme
The FAN5353 uses a proprietary non-linear, fixed-frequency PWM modulator to deliver a fast load transient response, while maintaining a constant switching frequency over a wide range of operating conditions. The regulator performance is independent of the output capacitor ESR, allowing for the use of ceramic output capacitors. Although this type of operation normally results in a switching frequency that varies with input voltage and load current, an internal frequency loop holds the switching frequency constant over a large range of input voltages and load currents.
Under-Voltage Lockout
When EN is HIGH, the under-voltage lockout keeps the part from operating until the input supply voltage rises high enough to properly operate. This ensures no misbehavior of the regulator during startup or shutdown.
Setting the Output Voltage
The output voltage is set by the R1, R2, and VREF (0.8V):
Input Over-Voltage Protection (OVP)
When VIN exceeds VSDWN (about 6.2V) the IC stops switching, to protect the circuitry from internal spikes above 6.5V. An internal 40s filter prevents the circuit from shutting down due to noise spikes. For the circuit to fully protect the internal circuitry, the VIN slew rate above 6.2V must be limited to no more than 15V/ms when the IC is switching. The IC protects itself if VIN overshoots to 7V during initial power-up as long as the VIN transition from 0 to 7V occurs in less than 10s (10% to 90%).
R1 VOUT - VREF = R2 VREF
R1 must be set at or below 100K. Therefore:
(1)
R2 =
R1* 0.8 (VOUT - 0.8)
(2)
For example, for VOUT = 1.2V, R1 = 100K, R2 = 200K.
Enable and Soft Start
When the EN pin is LOW, the IC is shut down, all internal circuits are off, and the part draws very little current. Raising EN above its threshold voltage activates the part and starts the soft-start cycle. During soft-start, the modulator's internal reference is ramped slowly to minimize any large surge currents on the input and prevents any overshoot of the output voltage. If large values of output capacitance are used, the regulator may fail to start. If VOUT fails to achieve regulation within 320s from the beginning of soft-start, the regulator shuts down and waits 1200s before attempting a restart. If the regulator is at its current limit for more than about 60s, the regulator shuts down before restarting 1200s later. This limits the COUT capacitance when a heavy load is applied during the startup. For a typical FAN5353 starting with a resistive load:
Current Limiting
A heavy load or short circuit on the output causes the current in the inductor to increase until a maximum current threshold is reached in the high-side switch. Upon reaching this point, the high-side switch turns off, preventing high currents from causing damage. 16 consecutive PWM cycles in current limit cause the regulator to shut down and stay off for about 1200s before attempting a restart. In the event of a short circuit, the soft-start circuit attempts to restart and produces an over-current fault after about 50s, which results in a duty cycle of less than 10%, providing current into a short circuit.
Thermal Shutdown
When the die temperature increases, due to a high load condition and/or a high ambient temperature, the output switching is disabled until the temperature on the die has fallen sufficiently. The junction temperature at which the thermal shutdown activates is nominally 150C with a 20C hysteresis.
COUTMAX ( F) 400 - 100 ILOAD ( A )
where ILOAD =
VOUT R LOAD
(3)
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Minimum Off-Time Effect on Switching Frequency
tON(MIN) and tOFF(MIN) are both 45ns. This imposes constraints on the maximum VOUT that the FAN5353 can provide, while VIN still maintaining a fixed switching frequency in PWM mode. While regulation is unaffected, the switching frequency drops when the regulator cannot provide sufficient duty cycle at 3MHz to maintain regulation. The calculation for switching frequency is given as:
1 1 fSW = min , t SW (MAX ) 333 .3ns
shows the effects of inductance higher or lower than the recommended 470nH on regulator performance.
Table 2. Effects of Increasing the Inductor Value (from 470nH recommended value) on Regulator Performance IMAX(LOAD)
Increase
VOUT (EQ. 8)
Decrease
Transient Response
Degraded
(4)
Inductor Current Rating

where:
VOUT + IOUT * R OFF t SW (MAX ) = 45ns * 1 + VIN - IOUT * R ON - VOUT
The FAN5353's current limit circuit can allow a peak current of 5.5A to flow through L1 under worst-case conditions. If it is possible for the load to draw that much continuous current, the inductor should be capable of sustaining that current or failing in a safe manner. For space-constrained applications, a lower current rating for L1 can be used. The FAN5353 may still protect these inductors in the event of a short circuit, but may not be able to protect the inductor from failure if the load is able to draw higher currents than the DC rating of the inductor.
R OFF = RDSON _ N + DCR L RON = RDSON _ P + DCR L
Applications Information
Selecting the Inductor
The output inductor must meet both the required inductance and the energy handling capability of the application. The inductor value affects the average current limit, the output voltage ripple, and the efficiency. The ripple current (I) of the regulator is:
I VOUT VIN - VOUT * L*f VIN SW
Output Capacitor
Note: suggests 0805 capacitors, but 0603 capacitors may be used if space is at a premium. Due to voltage effects, the 0603 capacitors have a lower in-circuit capacitance than the 0805 package, which can degrade transient response and output ripple. Increasing COUT has no effect on loop stability and can therefore be increased to reduce output voltage ripple or to improve transient response. Output voltage ripple, VOUT, is:
1 VOUT = I * + ESR 8*C OUT * fSW
(5)
The maximum average load current, IMAX(LOAD) is related to the peak current limit, ILIM(PK)by the ripple current as:
(8)
IMAX(LOAD) = ILIM(PK ) -
I 2
(6)
The FAN5353 is optimized for operation with L=470nH, but is stable with inductances up to 1.2H (nominal). The inductor should be rated to maintain at least 80% of its value at ILIM(PK). Failure to do so lowers the amount of DC current the IC can deliver. Efficiency is affected by the inductor DCR and inductance value. Decreasing the inductor value for a given physical size typically decreases the DCR; but since I increases, the RMS current increases, as do core and skin effect losses.
IRMS = IOUT (DC ) 2 + I 2 12
where COUT is the effective output capacitance. The capacitance of COUT decreases at higher output voltages, which results in higher VOUT . If COUT is greater than 100F, the regulator may fail to start under load. If an inductor value greater than 1.0H is used, at least 30F of COUT should be used to ensure stability.
ESL Effects
The ESL (Equivalent Series Inductance) of the output capacitor network should be kept low to minimize the square wave component of output ripple that results from the division ratio COUT's ESL and the output inductor (LOUT). The square wave component due to ESL can be estimated as:
(7)
The increased RMS current produces higher losses through the RDS(ON) of the IC MOSFETs as well as the inductor ESR. Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current.
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
VOUT(SQ) VIN *
ESL COUT L1
(9)
A good practice to minimize this ripple is to use multiple output capacitors to achieve the desired COUT value. For
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
example, to obtain COUT = 20F, a single 22F 0805 would produce twice the square wave ripple of 2 x 10F 0805. To minimize ESL, try to use capacitors with the lowest ratio of length to width. 0805s have lower ESL than 1206s. If low output ripple is a chief concern, some vendors produce 0508 or 0612 capacitors with ultra-low ESL. Placing additional small value capacitors near the load also reduces the highfrequency ripple components.
and transient excursions. The inductor in this example is the TDK VLC5020T-R47N. VCC and VIN should be connected together by a thin trace some distance from the IC, or through a resistor (shown as R3 below), to isolate the switching spikes on PVIN from the IC bias supply on VCC. If PCB area is at a premium, the connection between PVIN and VCC can be made on another PCB layer through vias. The via impedance provides some filtering for the high-frequency spikes generated on PVIN. PGND and AGND connect through the thermal pad of the IC. Extending the PGND and AGND planes improves IC cooling. The IC analog ground (AGND) is bonded to P1 between pins 1 and 12. Large AC ground currents should return to pins 3 and 4 (PGND) either through the copper under P1 between pins 6 and 7 or through a direct trace from pins 3 and 4 (as shown for COUT1-COUT3). EN and PGOOD connect through vias to the system control logic. CIN1 is an optional device used to provide a lower impedance path for high-frequency switching edges/spikes, which helps to reduce SW node and VIN ringing. CIN should be placed as close as possible between PGND and VIN, as shown below. PGND connection back to inner planes should be accomplished as series of vias distributed among the COUT return track and CIN return plane between pins 6 and 7.
Input Capacitor
The 10F ceramic input capacitor should be placed as close as possible between the VIN pin and PGND to minimize the parasitic inductance. If a long wire is used to bring power to the IC, additional "bulk" capacitance (electrolytic or tantalum) should be placed between CIN and the power source lead to reduce under-damped ringing that can occur between the inductance of the power source leads and CIN. The effective CIN capacitance value decreases as VIN increases due to DC bias effects. This has no significant impact on regulator performance.
Layout Recommendations
The layout recommendations below highlight various topcopper planes by using different colors. It includes COUT3 to demonstrate how to add COUT capacitance to reduce ripple
AGND VOUT
COUT3 COUT2 COUT1 0402
1 2 3 4 5 6
12
0402
10F 0805
10F 0805
10F 0805
FAN5353
P1 (GND)
CVCC
11 10 9 8 7 10F 0805
CIN
0603
PGND
VCC
R3
0402
L1
VIN
SW
0.47H 5 x 5 mm
CIN1
0402
PGND
Figure 23. 3A Layout Recommendation
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
Physical Dimensions
Figure 24. 12-Lead, 3x3.5mm Molded Leadless Package (MLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2009 Fairchild Semiconductor Corporation FAN5353 * Rev. 1.0.2
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FAN5353 -- 3MHz, 3A Synchronous Buck Regulator
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